Symmetric and Asymmetric Switched-Capacitor Multilevel Inverter Topology with Reduced Components

This study proposes a novel single-phase switched capacitor multilevel inverter structure for symmetrical and asymmetrical operation. The proposed configuration requires two DC sources, twelve switches, two flying capacitors, and a single diode to generate 9-level and 21-level output voltage. The proposed configuration features inherent self-voltage balancing without sensors, ensuring stable operation under varying conditions. The switched-capacitors enhance voltage gain (V_o=10V_dc) while reducing component count and switch stress. A single-carrier pulse width modulation (SC-PWM) method is utilized to minimize computation time and produce gating signals. The proposed topology is designed and simulated in PLECS software, incorporating thermal modeling to assess its efficiency and overall performance. The experimental setup was prepared, and a thorough comparative evaluation was carried out using dual-source-based topologies. The proposed topology demonstrates superior performance and enhanced design characteristics.