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FREYA: A 0.023-mm<SUP>2</SUP> /Channel, 20.8-$\mu$ W/Channel, Event-Driven 8-Channel SoC for Spiking End-to-End Sensing of Time-Sparse Biosignals

  • Jonah Van Assche*
  • , Charlotte Frenkel
  • , Ali Safa
  • , Georges Gielen
  • *Corresponding author for this work
  • University of Stuttgart
  • Delft University of Technology
  • KU Leuven

Research output: Contribution to journalArticlepeer-review

Abstract

Biomedical systems-on-chip (SoCs) for real-time monitoring of vital signs need to read out multiple recording channels in parallel and process them locally with low latency, at a low per-channel area and power consumption. To achieve this, event-driven SoCs that exploit the time-sparse nature of biosignals such as the electrocardiogram (ECG) have been proposed; they only process the signal when it shows activity. Such SoCs convert time-sparse biosignals into spike trains, on which spiking neural networks (SNNs) can perform event-driven signal classification. State-of-the-art event-driven SoCs, however, still suffer from poor area and power efficiency and use inflexible, hard-coded spike-encoding schemes. To improve on these challenges, this paper presents FREYA, an 8-channel event-driven SoC for end-to-end sensing of time-sparse biosignals. The proposed SoC consists of the following key contributions: 1) an 8-channel time-division-multiplexed level-crossing sampling (LCS) analog-to-spike converter (ASC) that encodes analog input signals into input spikes for an on-chip SNN; 2) an ASC spike-encoding algorithm that is fully programmable in resolution (4 to 8 bits) and conversion algorithm (offset and decay parameters); 3) an on-chip integrated, flexible SNN processor based on a programmable crossbar architecture, that allows for efficient event-driven processing, and that can be reconfigured towards multiple sensing applications; 4) a custom offline end-to-end training framework for the fast retraining of the spike-encoding algorithm and SNN architecture towards new applications or patient-dependent signal variations. A prototype IC has been fabricated in a 40nm CMOS technology. It has a per-channel active area of 0.023 mm2 (0.184 mm2 in total), a 7× improvement over the state of the art. For the use case of ECG-based QRS-labeling, a detection accuracy of 98.67% is achieved, while the system consumes 20.8μ W per channel and achieves a latency of only 80 ms, thus paving the way for multi-channel, high-fidelity, event-driven SoCs in biomedical applications.

Original languageEnglish
Pages (from-to)1093-1104
Number of pages12
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume72
Issue number3
Early online dateNov 2024
DOIs
Publication statusPublished - 28 Nov 2024

Keywords

  • Accuracy
  • Biomedical SoC
  • Clocks
  • Electrocardiography
  • Encoding
  • Event-driven sensing
  • Level-crossing sampling
  • Logic
  • Power demand
  • Sensors
  • Signal resolution
  • Spiking neural networks
  • System-on-chip
  • Training

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