Focal plane image segmentation using locally interconnected spiking pixel architecture

Amine Bermak; Matthias Hofinger

Focal plane image segmentation using locally interconnected spiking pixel architecture

Amine Bermak^*
, Matthias Hofinger

^*Corresponding author for this work

Hong Kong University of Science and Technology
Ulm University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

In this paper we describe a focal-plane image segmentation architecture using an array of spiking pixels. We first describe the spiking pixel architecture which can be used in a locally interconnected network in order to perform image capture as well as image segmentation. Inspired from Biological visual systems and the integrate and fire oscillator, three different schemes are studied and their ability to perform image segmentation is compared. Simulation results demonstrate that heavy computational processing such as image segmentation can be realized with spiking pixel architecture organized in locally interconnected networks allowing them to be very suitable for VLSI implementation. Each pixel within the focal plane processing image sensor occupies an area of only 45 × 45μm² using CMOS 0.25μm technology.

Original language	English
Title of host publication	Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	V833-V836
ISBN (Print)	0780377613
Publication status	Published - 2003
Externally published	Yes
Event	2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003 - Bangkok, Thailand Duration: 25 May 2003 → 28 May 2003

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	5
ISSN (Print)	0271-4310

Conference

Conference	2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003
Country/Territory	Thailand
City	Bangkok
Period	25/05/03 → 28/05/03

Cite this

@inproceedings{2577c8b010f44b46a2bcc99c7f344743,

title = "Focal plane image segmentation using locally interconnected spiking pixel architecture",

abstract = "In this paper we describe a focal-plane image segmentation architecture using an array of spiking pixels. We first describe the spiking pixel architecture which can be used in a locally interconnected network in order to perform image capture as well as image segmentation. Inspired from Biological visual systems and the integrate and fire oscillator, three different schemes are studied and their ability to perform image segmentation is compared. Simulation results demonstrate that heavy computational processing such as image segmentation can be realized with spiking pixel architecture organized in locally interconnected networks allowing them to be very suitable for VLSI implementation. Each pixel within the focal plane processing image sensor occupies an area of only 45 {\texttimes} 45μm2 using CMOS 0.25μm technology.",

author = "Amine Bermak and Matthias Hofinger",

year = "2003",

language = "English",

isbn = "0780377613",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "V833--V836",

booktitle = "Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003",

address = "United States",

note = "2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003 ; Conference date: 25-05-2003 Through 28-05-2003",

}

Bermak, A & Hofinger, M 2003, Focal plane image segmentation using locally interconnected spiking pixel architecture. in Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003. Proceedings - IEEE International Symposium on Circuits and Systems, vol. 5, Institute of Electrical and Electronics Engineers Inc., pp. V833-V836, 2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, 25/05/03.

Focal plane image segmentation using locally interconnected spiking pixel architecture. / Bermak, Amine; Hofinger, Matthias.
Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003. Institute of Electrical and Electronics Engineers Inc., 2003. p. V833-V836 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 5).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Focal plane image segmentation using locally interconnected spiking pixel architecture

AU - Bermak, Amine

AU - Hofinger, Matthias

PY - 2003

Y1 - 2003

N2 - In this paper we describe a focal-plane image segmentation architecture using an array of spiking pixels. We first describe the spiking pixel architecture which can be used in a locally interconnected network in order to perform image capture as well as image segmentation. Inspired from Biological visual systems and the integrate and fire oscillator, three different schemes are studied and their ability to perform image segmentation is compared. Simulation results demonstrate that heavy computational processing such as image segmentation can be realized with spiking pixel architecture organized in locally interconnected networks allowing them to be very suitable for VLSI implementation. Each pixel within the focal plane processing image sensor occupies an area of only 45 × 45μm2 using CMOS 0.25μm technology.

AB - In this paper we describe a focal-plane image segmentation architecture using an array of spiking pixels. We first describe the spiking pixel architecture which can be used in a locally interconnected network in order to perform image capture as well as image segmentation. Inspired from Biological visual systems and the integrate and fire oscillator, three different schemes are studied and their ability to perform image segmentation is compared. Simulation results demonstrate that heavy computational processing such as image segmentation can be realized with spiking pixel architecture organized in locally interconnected networks allowing them to be very suitable for VLSI implementation. Each pixel within the focal plane processing image sensor occupies an area of only 45 × 45μm2 using CMOS 0.25μm technology.

UR - https://www.scopus.com/pages/publications/0038419790

M3 - Conference contribution

AN - SCOPUS:0038419790

SN - 0780377613

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - V833-V836

BT - Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2003 IEEE International Symposium on Circuits and Systems, ISCAS 2003

Y2 - 25 May 2003 through 28 May 2003

ER -

Focal plane image segmentation using locally interconnected spiking pixel architecture

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