Fast VLSI chip for computing the two-dimensional discrete cosine transform

William S. Wong; Anthony Berno; Hussein M. Alnuweiri

Fast VLSI chip for computing the two-dimensional discrete cosine transform

William S. Wong^*, Anthony Berno, Hussein M. Alnuweiri

^*Corresponding author for this work

University of British Columbia

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

A VLSI chip which performs an 8-point Discrete Cosine Transform using Distributed Arithmetic and Li's algorithm has been successfully designed and tested. Its total throughput is as high as 250 Mbits per second, which is of the order required for real-time applications such as the compression of video. Both the size and performance of the chip can be substantially improved through changes in its technology and design. Work on a 2-D DCT processor based on this unit is in progress.

Original language	English
Title of host publication	Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process
Publisher	Publ by IEEE
Pages	662-665
Number of pages	4
ISBN (Print)	0780312198
Publication status	Published - 1993
Externally published	Yes
Event	Proceedings of the IEEE 1993 Pacific Rim Conference on Communications, Computers and Signal Processing - Victoria, BC, Can Duration: 19 May 1993 → 21 May 1993

Publication series

Name	Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process

Conference

Conference	Proceedings of the IEEE 1993 Pacific Rim Conference on Communications, Computers and Signal Processing
City	Victoria, BC, Can
Period	19/05/93 → 21/05/93

Cite this

@inproceedings{5567a7b511344ec998c16697cc9468c9,

title = "Fast VLSI chip for computing the two-dimensional discrete cosine transform",

abstract = "A VLSI chip which performs an 8-point Discrete Cosine Transform using Distributed Arithmetic and Li's algorithm has been successfully designed and tested. Its total throughput is as high as 250 Mbits per second, which is of the order required for real-time applications such as the compression of video. Both the size and performance of the chip can be substantially improved through changes in its technology and design. Work on a 2-D DCT processor based on this unit is in progress.",

author = "Wong, \{William S.\} and Anthony Berno and Alnuweiri, \{Hussein M.\}",

year = "1993",

language = "English",

isbn = "0780312198",

series = "Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process",

publisher = "Publ by IEEE",

pages = "662--665",

booktitle = "Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process",

note = "Proceedings of the IEEE 1993 Pacific Rim Conference on Communications, Computers and Signal Processing ; Conference date: 19-05-1993 Through 21-05-1993",

}

Wong, WS, Berno, A & Alnuweiri, HM 1993, Fast VLSI chip for computing the two-dimensional discrete cosine transform. in Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process. Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process, Publ by IEEE, pp. 662-665, Proceedings of the IEEE 1993 Pacific Rim Conference on Communications, Computers and Signal Processing, Victoria, BC, Can, 19/05/93.

Fast VLSI chip for computing the two-dimensional discrete cosine transform. / Wong, William S.; Berno, Anthony; Alnuweiri, Hussein M.
Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process. Publ by IEEE, 1993. p. 662-665 (Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Wong, William S.

AU - Berno, Anthony

AU - Alnuweiri, Hussein M.

PY - 1993

Y1 - 1993

N2 - A VLSI chip which performs an 8-point Discrete Cosine Transform using Distributed Arithmetic and Li's algorithm has been successfully designed and tested. Its total throughput is as high as 250 Mbits per second, which is of the order required for real-time applications such as the compression of video. Both the size and performance of the chip can be substantially improved through changes in its technology and design. Work on a 2-D DCT processor based on this unit is in progress.

AB - A VLSI chip which performs an 8-point Discrete Cosine Transform using Distributed Arithmetic and Li's algorithm has been successfully designed and tested. Its total throughput is as high as 250 Mbits per second, which is of the order required for real-time applications such as the compression of video. Both the size and performance of the chip can be substantially improved through changes in its technology and design. Work on a 2-D DCT processor based on this unit is in progress.

UR - https://www.scopus.com/pages/publications/0027150698

M3 - Conference contribution

AN - SCOPUS:0027150698

SN - 0780312198

T3 - Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process

SP - 662

EP - 665

BT - Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process

PB - Publ by IEEE

T2 - Proceedings of the IEEE 1993 Pacific Rim Conference on Communications, Computers and Signal Processing

Y2 - 19 May 1993 through 21 May 1993

ER -

Fast VLSI chip for computing the two-dimensional discrete cosine transform

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