A low power CMOS imager based on Time-To-First-Spike encoding and fair AER

Chen Shoushun; Amine Bermak

doi:10.1109/ISCAS.2005.1465833

A low power CMOS imager based on Time-To-First-Spike encoding and fair AER

Chen Shoushun^*
, Amine Bermak

^*Corresponding author for this work

Hong Kong University of Science and Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

43 Citations (Scopus)

Abstract

This paper presents a CMOS vision sensor based on a biologically inspired data representation referred to as Time-to-First-Spike (TFS) encoding combined with a fair Address Event Representation (AER) scheme. Our approach is different from conventional methods because the read-out of information is initiated by the pixel itself while access to the read-out bus is granted only once to each pixel after which it enters into a stand-by mode. This approach allows to greatly save dynamic power consumption and to extensively reduce inefficiencies due to periodical requests of the bus in the case of spiking pixels. Transmission bandwidth is thus significantly improved using the proposed circuitry. Each pixel includes only 14 transistors and occupies an area of 15 × 15 μm² with a fill factor of 33% using 0.35μm process. The average current consumption is estimated to 10nA per pixel, which is 3 orders of magnitude lower compared with that of the spiking pixel.

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	5306-5309
Number of pages	4
ISBN (Print)	9780780388345
DOIs	https://doi.org/10.1109/ISCAS.2005.1465833
Publication status	Published - 2005
Externally published	Yes
Event	2005 IEEE International Symposium on Circuits and Systems, ISCAS 2005 - Kobe, Japan Duration: 23 May 2005 → 26 May 2005

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	2005 IEEE International Symposium on Circuits and Systems, ISCAS 2005
Country/Territory	Japan
City	Kobe
Period	23/05/05 → 26/05/05

Access to Document

10.1109/ISCAS.2005.1465833

Cite this

Shoushun, C., & Bermak, A. (2005). A low power CMOS imager based on Time-To-First-Spike encoding and fair AER. In Proceedings - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 (pp. 5306-5309). Article 1465833 (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2005.1465833

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title = "A low power CMOS imager based on Time-To-First-Spike encoding and fair AER",

abstract = "This paper presents a CMOS vision sensor based on a biologically inspired data representation referred to as Time-to-First-Spike (TFS) encoding combined with a fair Address Event Representation (AER) scheme. Our approach is different from conventional methods because the read-out of information is initiated by the pixel itself while access to the read-out bus is granted only once to each pixel after which it enters into a stand-by mode. This approach allows to greatly save dynamic power consumption and to extensively reduce inefficiencies due to periodical requests of the bus in the case of spiking pixels. Transmission bandwidth is thus significantly improved using the proposed circuitry. Each pixel includes only 14 transistors and occupies an area of 15 {\texttimes} 15 μm2 with a fill factor of 33\% using 0.35μm process. The average current consumption is estimated to 10nA per pixel, which is 3 orders of magnitude lower compared with that of the spiking pixel.",

author = "Chen Shoushun and Amine Bermak",

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series = "Proceedings - IEEE International Symposium on Circuits and Systems",

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note = "2005 IEEE International Symposium on Circuits and Systems, ISCAS 2005 ; Conference date: 23-05-2005 Through 26-05-2005",

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Shoushun, C & Bermak, A 2005, A low power CMOS imager based on Time-To-First-Spike encoding and fair AER. in Proceedings - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005., 1465833, Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., pp. 5306-5309, 2005 IEEE International Symposium on Circuits and Systems, ISCAS 2005, Kobe, Japan, 23/05/05. https://doi.org/10.1109/ISCAS.2005.1465833

A low power CMOS imager based on Time-To-First-Spike encoding and fair AER. / Shoushun, Chen; Bermak, Amine.
Proceedings - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005. Institute of Electrical and Electronics Engineers Inc., 2005. p. 5306-5309 1465833 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - This paper presents a CMOS vision sensor based on a biologically inspired data representation referred to as Time-to-First-Spike (TFS) encoding combined with a fair Address Event Representation (AER) scheme. Our approach is different from conventional methods because the read-out of information is initiated by the pixel itself while access to the read-out bus is granted only once to each pixel after which it enters into a stand-by mode. This approach allows to greatly save dynamic power consumption and to extensively reduce inefficiencies due to periodical requests of the bus in the case of spiking pixels. Transmission bandwidth is thus significantly improved using the proposed circuitry. Each pixel includes only 14 transistors and occupies an area of 15 × 15 μm2 with a fill factor of 33% using 0.35μm process. The average current consumption is estimated to 10nA per pixel, which is 3 orders of magnitude lower compared with that of the spiking pixel.

AB - This paper presents a CMOS vision sensor based on a biologically inspired data representation referred to as Time-to-First-Spike (TFS) encoding combined with a fair Address Event Representation (AER) scheme. Our approach is different from conventional methods because the read-out of information is initiated by the pixel itself while access to the read-out bus is granted only once to each pixel after which it enters into a stand-by mode. This approach allows to greatly save dynamic power consumption and to extensively reduce inefficiencies due to periodical requests of the bus in the case of spiking pixels. Transmission bandwidth is thus significantly improved using the proposed circuitry. Each pixel includes only 14 transistors and occupies an area of 15 × 15 μm2 with a fill factor of 33% using 0.35μm process. The average current consumption is estimated to 10nA per pixel, which is 3 orders of magnitude lower compared with that of the spiking pixel.

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Shoushun C, Bermak A. A low power CMOS imager based on Time-To-First-Spike encoding and fair AER. In Proceedings - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005. Institute of Electrical and Electronics Engineers Inc. 2005. p. 5306-5309. 1465833. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2005.1465833

A low power CMOS imager based on Time-To-First-Spike encoding and fair AER

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