A 0.9V CMOS Voltage Reference with 0.41% Untrimmed Accuracy and 44.7 ppm/°C TC from -35°C to 130°C

A stable bandgap voltage reference (BGR) with low power consumption and small area is essential for the long-term operation and miniaturization of Internet-of-Things sensors and implantable devices. Recently, CMOS-only circuits [1]-[4] have been proposed to meet this requirement. However, when using the threshold voltage (V_TH) of MOSFETs as a complementary-to-absolute-temperature (CTAT) voltage (V_CTAT) in a reference, the inherent variability of V_TH would introduce process dependency. To compensate the process variation in V_TH, a hybrid architecture combining BGR and CMOS reference with dimension-induced side effects [5] has been proposed. Nevertheless, the compensation relies on a BJT-generated proportional to faster-skewed process (PTFP) voltage (VPTFP), constraining the minimum supply voltage to 1 V. Alternatively, [1] utilizes the threshold difference between transistors in stacked diode MOS transistors (SDMT) to generate an output that is robust to PVT variations without using BJTs, effectively reducing the supply voltage to 0.9 V. Nonetheless, since Vctat and Vptap are generated within the same SDMT, individual optimization of TC curvature without affecting process compensation is complicated, resulting in a high temperature coefficient (above 60ppm /°C) from -40 to 130°C. This paper presents a compensation method that eliminates the use of BJT by separating PTAT and CTAT generators from a single branch. The proposed technique introduces VPTFP to the output through the V_TH difference of the input transistor pair within the PTAT-embedded amplifier, while enhancing Vctat linearity with a nonlinear CTAT current. Fabricated in 180nm CMOS, the untrimmed voltage reference exhibits a 0.4% standard deviation and a TC of 44.7ppm/°C from -35°C to 130°C, with a mean output of 524 mV.